19 Feb

Simplifying generator semantics for the board design HDL

Richard Lin (Ducky) edg-model edg-refactoring ducky

prdiff

We always like to see when we can remove more lines of code than we add.

The refactor mentioned in the blog post two weeks ago is finally done and merged, and in general refactoring is wrapping up. Hopefully new feature development (port arrays, then multipack devices) will start next week.

As a short summary, this refactor changed the behavior of generators - blocks that are defined by HDL that is responsive to the context around it (and specifically, it can get the concrete value of solved circuit parameters - for example, the operating voltage). While we can define parameter propagation rules in blocks that aren't generators (for example, self.assign(self.resistance, self.input.voltage / self.target_current) just creates the equation without knowledge of the actual values), this is restricted by the operators available in this mini-parameter-language. Where we need to general power of Python (for example, reading from a parts table), or the circuit structure depends on its context, we need to use a generator and get the solved value in Python.

Previously, the semantics were that generator blocks could define multiple generate functions, each of which would contribute to the block. Practically, we never used multiple generate functions, and actually never figured out the semantics for when two generators contribute multiple internal blocks connected to the same link (or net). And given that, this refactor just simplifies it by restricting generators to one function, and furthermore that generate function turns the blocks from a stub (without implementation) to the fully implemented block (much like block elaboration in the non-generator case).

This does create an issue where some generator blocks previously depended on constraints within the same block (for example, the buck converter generator depends on the feedback resistor network that determined the actual output voltage), but this was solved by reducing the scope of generators (for example, the new buck converter generator only covers the power path, and itself and the feedback resistor network is part of a larger non-generator buck converter block).

Much of the refactoring was cleaning up the library, along with other opportunistic and necessary code quality cleanups.

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