Weekly WIPs (work in progress) are shorter posts that describe projects or features that are still being worked on, as opposed to fuller posts looking at completed work. Most features take weeks to build, so these are smaller intermediate progress reports, but hopefully will still be interesting!


The last post showing green tests had 177 tests, now we're up to 180! (and that's excluding the compiler unit tests that are written in Scala)

Last week's post defined port arrays as parameter-defined ports, and since then, the logic and implementation has been further fleshed out. Two new special parameters have been created: allocated and elements. When a port array is exported, allocated propagates inwards, while elements propagates outwards, which enables a wrapper pattern for port array types, where the outer port behaves similar to the inner port. Most of the week was implementing that, which required (yet again) a refactor of the connection logic, though things are much cleaner now... aside from all the complexity added to implement array-exporting.

Next week will finally use this feature to update the microcontroller class, and possible a few other places where array ports are useful. Proper parallel array-connections (between blocks at the same level) will probably require another lengthy development cycle, but will enable things like parallel digital IO connections - for example for a ranging circuit for a multimeter.

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